It is known in the art to provide a termination impedance of perhaps 50 .OMEGA. to 100 .OMEGA. at the far end of a transmission line driven by output node of an electronic circuit, including an integrated circuit ("IC"). For example, if signals are coupled from an IC output using coaxial cable, a 50 .OMEGA. or 75 .OMEGA. termination impedance matched to the cable is desired, while signals provided to small computer system interface bus ("SCSI") are commonly terminated with 100 .OMEGA. impedance. Unless suitably terminated, the IC output node signal may exhibit ground bounce, overshoot and undershoot, and exhibit back reflections, especially at higher switching frequencies, e.g., 100 MHz or higher.
By way of example, FIG. 1 depicts a substrate 10 such as a printed wiring board that includes integrated circuits 20A, 20B, 30A, 30B, 40 and 50, whose various output or input nodes may require termination with a suitable terminating resistor R. Circuits 20A, 20B, for example, may be drivers whose properly terminated output signals may be coupled to other on-substrate circuits 30A, 30B such as receivers, or perhaps to circuits such as integrated circuit 60 on a second substrate 70. Other circuits, e.g., 40 and 50, may also require input/output pin termination. Circuit 50, for example, might be an analog video buffer.
In FIG. 1, output signals from driver 20B on IC 10 are depicted as coupled via lines 50, e.g., printed circuit board or printed wiring board traces, or wires, or perhaps coaxial cables, to IC 60 whose input pins are properly terminated with resistors R. (While FIG. 1 depicts circuit 20B with dual output pins, for digital circuits a single output pin is more commonly used.)
In FIG. 1, the signals coupled over lines 50 may represent a multi-bit high speed bus. In practice, such a bus may carry not merely four signals as shown in FIG. 1, but hundreds of signals, each of which requires proper termination. Further, although IC 10 is depicted with twenty-four input or output pins, here depicted as 100-1, 100-2, . . . 100-24, in practice there may be hundreds of such pins.
As shown in FIG. 1, it is known in the art to provide an array of termination resistors R in one or more IC packages, e.g., 150A, 150B, 150C. The use of such termination resistor arrays advantageously reduces the number of components that must be placed on a printed circuit board, a printed wiring board, or on a substrate containing, for example, IC 10, IC 60 and arrays 150A, 150B, 150C. Although FIG. 1 depicts only thirty termination resistors R (not all of which are used), in practice hundreds of such resistors may be required
IC 150A is a so-called dual-inline-package ("DIP"), in which each termination resistor in the array has a first end (or contact) coupled to an input/output pin on the array package, and has a second end (or contact) coupled to a common V.sub.T termination voltage node. IC 150B and IC 150C are so-called single-inline packages ("SIP"), and also contain an array of termination resistors that each have one end coupled to a V.sub.T node. In use, the V.sub.T node will be coupled to a source of V.sub.T termination voltage. The magnitude of this voltage may be ground, -2 VDC when terminating emitter-coupled logic ("ECL"), +1.25 when terminating Gunning transceiver logic ("GTL"), or some other potential magnitude.
In practice, digital ICs 20, 30 may operate at switching speeds in excess of 100 MHz. Thus, it is important that terminating impedances R present a pure resistive impedance with relatively small parasitic inductance and/or capacitance components. Such parasitic, or imaginary, impedance components can result in overshoot and undershoot on rapidly changing signals, and can result in a load impedance that can undesirably reflect at least part of the signal back into the outputting IC, reducing system noise margin. In general, cables, backplanes, printed wiring board traces, and traces internal to an IC are treated as though they were transmission line segments when their line electrical length exceeds 50% of the risetime of the signals being carried.
FIG. 2A is a prior art SIP array, such as array 150B shown in FIG. 1. The distal first ends of each resistor are coupled to IC 150B input/output pins, e.g., 160-2, 160-3 . . . 160-9. One pin, 160-1, is used to couple the V.sub.T potential to the common second ends of the resistors R in array 150B. For ease of illustration, FIG. 1 shows input/output pins on ICs 150A, 150B, 15C spaced-apart or unconnected to input/output pins on ICs 10 and 60. In practice, corresponding pins are coupled together, e.g., pin 160-1 on IC 150B is coupled to a source of potential V.sub.T, pin 160-2 is coupled to pin 100-12, and so forth. Such couplings are typically made using conductive traces on a substrate or printed wiring board or printed circuit board containing the various ICs and arrays.
As depicted in FIG. 2B, prior art SIP array 150B is characterized by inductances L.sub.1 in series with the distal end of each resistor R, and by inductance L.sub.2 coupled in series between adjacent resistors. (The DIP array 150A shown in FIG. 1 may also be presented as including inductances L.sub.1 and L.sub.2.)
Inductance is a measure of the energy contained in the magnetic field caused by current flow through a conductor. Unfortunately, SIP termination arrays such as 150B have an effective half-turn inductive loop formed of conductive material in the current path. Absent magnetic materials (such as iron), inductance would be primarily a property of the geometry of the current flow. Thus, with respect to SIP array 150B as shown in FIG. 1 and FIG. 2A, if the inductive loop were reduced in size or preferably eliminated, inductances L.sub.1 and L.sub.2 could be reduced or substantially eliminated.
Those skilled in the art of high speed circuit design will appreciate that the equivalent inductance (L.sub.eq) associated with any given R can degrade rapidly changing current transitions (di/dt) appearing across the resistor. Ideally such inductances should have zero value.
Typically, voltage spiking related to L.sub.eq di/dt may occur, where L.sub.eq is the equivalent inductance, and di/dt represents current change as a function of time. One component of such voltage spiking is sometimes referred to as ground bounce.
Further, the complex (e.g., not purely resistive or real) impedance presented can result in a substantial impedance mismatch between a transmission line and its load. This impedance mismatch can cause a portion of the signal being output to reflect back into the line, with resultant degradation of signal quality and digital noise margins. Such degradation becomes more troublesome at higher frequencies because a given amount of parasitic impedance contributes a greater amount of phase shift and impedance mismatching.
In addition to providing termination resistors having low parasitic impedance components, a termination array should also provide adequate heat dissipation. Unfortunately, prior art termination resistor arrays such as array 150 do not necessarily provide good thermal transfer characteristics.
There is a need for an array of termination resistors having reduced magnitude reactive components. Preferably such an array should be implemented using existing fabrication techniques, and should provide substantially real termination impedance for signals having rise and/or fall times of 200 ps or less. Finally, such an array should have adequate heat dissipation characteristics.
The present invention provides such a termination resistor array and a method for fabricating the array.